FLASH and SDRAM pins share the same FPGA pin

Have you installed Nios II EDS? If not, you should install it. Most of the reference designs can be found at <Nios II EDS installation path>\examples folder. For example, if you are using Quartus II/Nios II EDS v9.1 and Nios II Development KIt (Cyclone II Edition - EP2C35), then the relevant designs (in Verilog) should be available at C:\Altera\91\nios2eds\examples\verilog\niosII_cycloneII_2c35 (assuming Nios II EDS has been installed to path C:\Altera\91.

You should be able to find the basic reference designs here. Start with those and modify them to suite your needs. This will also help you get the idea about the usage of shared memory chips, etc.

Cheers

-BD