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Legos07's avatar
Legos07
Icon for New Contributor rankNew Contributor
22 days ago

Cyclone10LP Remote System Upgrade

Hi guys,

I am working on implementing Remote System Upgrade for my Cyclone 10LP FPGA, which loads its configuration data from an external flash device (MT25QL128). I've reviewed multiple documents on RSU and concluded that I need to have two broad sections in my design: firstly, a flash controller for writing configuration data to the flash device, and secondly, a remote update IP for switching between the factory and application image. (Please correct me if I misunderstood something)

1.) Now I've been facing a problem with finding a suitable IP for the flash controller section that can access the SPI pins with the flash device. I've tried using the generic serial flash interface IP, but it supports MT25* flashes with sizes above 256Mb only. So, is there any suitable IP for this purpose that supports both Cyclone10LP and MT25QL128? Or is it possible to write a state machine for this purpose and access those SPI pins through my design (which are normally not accessible)?

 

2.) The Remote Update IP again doesn't have MT25QL128 in its supported devices. Some sources suggest selecting Macronix flash device with a similar density in the parameter editor gui. Does that really work or are there any better alternatives?

3.) Also what does changing configuration mode to "Remote" in Quartus GUI actually do?  Gives access to Flash SPI pins in some way?

Looking forward to your responses, thanks.

2 Replies

  • FakhrulA_altera's avatar
    FakhrulA_altera
    Icon for Regular Contributor rankRegular Contributor

    Hi Legos07,

    Quick actions:

    1)Use ASMI Parallel II or GSFI IP for flash access. The configuration SPI pins are dedicated, not driven by user logic. [cdrdv2-pub....intel.com], [macnica.co.jp]
    2)Enable MT25Q support in Quartus via quartus.ini:

    INIpgm_allow_mt25q=onShow more lines
    Regenerate IP and programming files. 
    3) If MT25QL128 is not listed in Remote Update IP, pick a Macronix part with the same density and keep “Enable reconfig POF checking” unchecked. 
    4) Build a JIC with fixed start addresses, then write the boot address and trigger reconfig. Use the watchdog only if your app services it

    Regards,
    Fakhrul

  • FakhrulA_altera's avatar
    FakhrulA_altera
    Icon for Regular Contributor rankRegular Contributor

    As we haven't received a response to our previous notification, this thread will be transitioned to community support. We hope all your concerns have been addressed. If you have any new questions, please feel free to open a new thread to receive support from Intel experts. Otherwise, community users will continue to assist you here. Thank you.