Forum Discussion
5 Replies
- sstrell
Super Contributor
What is your target device? Did you enable EMIF Toolkit accessibility when you parameterized the IP?
Also, you can find much more up-to-date documentation here:
https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/external-memory-interfaces-support.html
#iwork4intel
- ALee11
New Contributor
I'm using USB blaster II indeed. I'm working w/ Cyclone V E family w/ HMC, so no ARM cortex
Is the cyclone V E device supported? according to this, the cyclone V SOC is not supported, so I am wondering if the E is supported.
section 17.5 of this doc https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/external-memory/emi_ip.pdf
- NurAida_A_Intel
Frequent Contributor
Dear ALee11,
May I know what Quartus version are you using? And if it is old version then I suggest you to try use newer Quartus version and see if it the error still there or not.
Next, I recommend you to create the example design, place it into same location and re-try the toolkit.
Also, without using emif toolkit, can you try to check the calibration status signal and see it is pass calibration? I am asking this because when there is no pll_ref_clk supply to the emif IP, it will cause the linking fail since the toolkit cannot detect anything from emif ip.
Hope this is helpful 😊
Regards,
NAli1
- ALee11
New Contributor
is cyclone V "E" supported in the tool at all? Is the restriction just on Cyclone V SOC or Cyclone V SOC AND Cyclone V E as stated in the link in my original post?
- NurAida_A_Intel
Frequent Contributor
Hi ALee11,
Sorry I overlook your question. Yes, Cyclone V E is supported in the tool. The restriction only for Cyclone V SoC part.
Thanks
Regards,
NAli1