Occasional ContributorHi, I have Generated example design for emif stratix 10 and simulation scripts too. While simulating in the modelsim ,every signal has default values only. even calib_success&fail both were low only!
one more thing ,I have generated emif core. With Avalon bus signal I am trying to feed some data,in this case aslo calibration is not going high.
Regular ContributorHi Sir,
I'm Adzim. Thanks for using Intel Community.
May I have a simulation log from the example design that you have run?
Also, can you share the example design with me?
I want to replicate the issue.
Thanks,
Adzim
Occasional ContributorI have created example design and generated simulation scripts from Quartus prime pro then simulated through modelsim ,in model sim local_cal_succes is low only.
Basically how much time does simulation takes to complete caliberation (i have used skip caliberation)?
Appolozies! I am not supposed to share any file!
Occasional Contributorcan you please share any emif ddr4 stratix design with model sim scripts whcih are working!
Thanks
venkatesh k
Regular ContributorHi Venkatesh,
I think you have to wait until the simulation is finished because there are some calibration that need to be done before the memory is ready.
If you enable the Abstract PHY mode, the simulation will go faster.
Are you using the msim_setup.tcl script from this directory: <your example design folder>/sim/ed_sim/mentor?
If so than you can run the do file that shared to you to simulate the design.
Thanks,
Adzim
Occasional ContributorHi sir ,
Thankyou for the reply,
If I do enable Abstract PHY,mem_* signals will not get anything means ,Abstract PHY enables only PHY not Controller! correct?
I Tried with Abstract PHY enable option too, but i didn't get calib_success!
Basically how much time Will take to complete the calibration?
Thanks for run.do file ,but i didn't see any change! still all the signals have default values except pll_clk,usr_clk !
I don't know what the issue is? am not getting output values?
Regular ContributorHi Venkatesh,
I think the time for finishing calibration should be around 30 minutes or more but it's depends on the device that has been used.
Is there any transaction in the log?
I think you need to let the design run -all and finishes the simulation.
It's will give you the result at the end.
Regards,
Adzim
Occasional ContributorYES sir, I did run -all only ,its been more than 2 hours ,still calib_success is low only!
I have been using Stratix 10 EMIF.
in log:
initializing RAM with calibration code ... ed_sim.emif_s10_0.emif_s10_0.arch.arch_inst.io_ssm_inst.io_ssm.inst.<protected> @ 2750 ps
after this empty.
what could be the issue?
Sir,do you have any code for custom data write and read instead of traffic generator?
Occasional Contributorone more thing sir,
at the end of compilation ,getting critical warning "DDR4 Timing Requirements not met".
In SDC file, I have created clocks for pll_clk and user_clk!
Is problem is related to timing issues?
Occasional Contributorhello sir,
if possible ,could you please share example design and simulation wave form snapshots in modelsim?
Occasional ContributorCan you share the example design sim scripts and model sim snapshots?
if you are free please Call me +91 8919938367 (india GMT+5:30 ( 9:00 am -6:00 pm)!
Regular ContributorHi Venkatesh,
I'm not able to share the example design for simulation because the size is exceed the limit.
So I would like you to do these:
I can share the EMIF IP setting that I've used to so you can generate the example design with the IP.
The waveform and simulation log also included.
Thanks,
Adzim
Occasional Contributorhi sir,
May I know whwther you have enabled "ABSTRACT PHY " or not?
while restoring the .qar file ,I am getting like this
Error:ERROR: Error(s) found while restoring the archive. See error message(s) for details.
Error: while executing
Error:"project_restore chiptrip.qar"
Regular ContributorHi Venkatesh,
Yes, I've enabled the Abstract PHY mode in the project.
You need to generate the example design from the EMIF IP in the project.
I've re-attached the project here.
I hope you can extract it without any error.
Maybe the file was corrupted during the compressing process.
Sorry for any trouble.
Regards,
Adzim
Occasional ContributorHi sir,
If we enable abstract phy option, how can we test this on custom board? Bcz in ABSTRACT PHY mode only PHY enabled not Hard controller?correct?
Regards
K Venkatesh
