Sho2301
New Contributor
9 months agoDual Configuration Intel FPGA IP Core Signals
Hi,
i have a few questions regarding the signals of this IP Core.
Am i correct to assume that the avmm_rcv_address sets the Offset for the register i want to read and write from, so that with avmm_rcv_writedata i can then write in that offset register.
For a example, would it be correct that if i wanted to enable the config_sel overwrite and set the config_sel to CFM 0 i would need to write the following:
avmm_rcv_address <= "001";
avmm_rcv_writedata (1 down to 0) <= "01"
avmm_rcv_writedata (31 down to 2) <= (others => '0');
I assume the avmm_rcv_read & avmm_rcv_write are used for write/read busy flags?
Thank you for your assistance
Regards,
Sho