Dual Configuration Intel FPGA IP Core Signals

Hi,
the MAX10 Configuration User Guide refers to Avalon Interface Specification https://www.intel.com/content/www/us/en/docs/programmable/683091/22-3/introduction-to-the-interface-specifications.html for details of AVMM interface. It should answer your questions about the function of specific signals. You don't necessarily need the info when you use Platform Designer to connect the configuration IP because all signals are wired automatically. But you may need it when you write your own AVMM master to drive the interface.

Regards
Frank