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YogeshaDG's avatar
YogeshaDG
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2 months ago
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Cyclone IV E(EP4CE30) FPGA JTAG and USB-Blaster

Hi Team, I am working with a Cyclone IV E FPGA(EP4CE30), where all my banks (Bank 1–8) have VCCIO = 3.3V. The FPGA core voltage is 1.2V, and the PLL supply is 2.5V. I am configuring the FPGA in Pass...
Configuration
Core Logic
Power
Programmable Logic Device
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
1 month ago

Hi,

 

This is the reference from the Cyclone IV Handbook for PS configuration mode using the download cable.

It shows the pull-up voltage for the USB blaster as well as the MSEL pin. It also shows the connection guideline for Pin 4 and 6 of the Male Header

For further information, you can refer to the handbook.

YogeshaDG's avatar
YogeshaDG
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1 month ago

Hi, 

i have referred this Handbook for Cyclone 4E, my doubt is that, all my I/O banks VCC's are 3.3V and here they have given pullup voltage reference as VCCA.  all these configurations pins are available in Bank 1 and Bank 6, and there respective VCCIO is 3.3V. if i gave pullup voltage VCCA of 2.5V to this lines, is there any problem occurs, or is it okay to provide any of the one (3.3V or 2.5v)..?