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Altera_Forum's avatar
Altera_Forum
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12 years ago

Cyclone 3 E144 package getting hot and Cannot program the Cyclone using EPSC4 Chip

Thanks in advance, for any help you guys can provide . I'm trying to configure a Cyclone 3 (EP3C5E144) device using AS configuration mode. I'm currently using the EPCS4 chip for the AS mode configuration. For some reason, after powering up the Cyclone and EPCS4 chip for bit, the Cyclone starts to heat up. I've checked my voltages for 3.3, 2.5 and 1.2 V for VCCIO, VCCA, and VCCINT, respectively. Those voltages goes to the right pin on the chip itself. I've used the AS mode circuit that was proposed by the Cyclone 3 handbook and connected MSEL[2..0] to '010', 0 being ground and 1 being VCCA (2.5V).

I'm a bit puzzled on whether I should use JTAG mode in the Quartus II Programmer or should I use AS mode. By the way, this is for my own prototype board. I've bought a Cyclone 3 Development board from Terasic and I have to select JTAG mode in Quartus programmer and convert my .SOF files into .JIC files to program the Cyclone on the development board. When I try to do the same technique with my prototype board, it stated that " Can't access JTAG chain". Then I had to convert my .SOF file into a .POF file and select Active Serial Programming (AS) mode to configure my EPSC4 chip. The programmer had shown to be able to program my EPCS4 chip completely. But I'm not getting any response from my Cyclone 3 device. I've checked all the pins on the EPCS4 chip and it doesn't seem to be active. I've checked my prototype many times to make sure the connections between the Cyclone 3 and EPCS4 chip is good and it is. I've actually have a second person check it multiple times too, before powering it.

After having my prototype on for less than a minute it starts to become warm and eventually hot, I've added a solid ground plane for the ground slot on the bottom of the Cyclone 3 chip (package EP3C5E144). I used a different chip and added the ground to it, that helped with the heat issue for a while. Then when I try to program it the same way I did before, it just started to heat up again. Have anyone ever encountered this same issue? If you do please help me as I'm currently new to FPGA development.

I've used the exact circuit in the Altera Cyclone 3 Handbook, Figure 9-7. In-System Programming of Serial Configuration Devices. I've added the protection Schottky Diodes and Capacitors as well. Please let me know if you have any further information or question.

Thank You

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Post your schematic and then forum members can take a look.

    It sounds like your 10-pin header is configured for AS mode, rather than JTAG mode. Most designers only implement the JTAG mode connector and use JIC for programming EPCS devices.

    What version of Quartus are you using to create your configuration file? Older versions of Quartus would set the default state of unused pins as "Output driving ground". If you create a top-level design that does not include all board-level connections, then this setting can cause driver conflicts with the external devices (the ones that drive the FPGA pins). So check your pin report file matches the board before download.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    Thank you for the response. I've attached the diagram that I've used for my connections. Yes I was able to program using the AS mode, Quartus programmer had stated that I've successfully programmed the EPSC4 chip. But for some reasons, its not getting through to my Cyclone 3 as I've specified from description above. If you need any more specific information, I will gladly provide it.

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I've attached the diagram that I've used for my connections.

    --- Quote End ---

    Right, this is what you'd explained above.

    --- Quote Start ---

    If you need any more specific information, I will gladly provide it.

    --- Quote End ---

    Post your schematic of your board. Whatever you have done to make the chip get hot may be obvious from that.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    Dave,

    I will have to put that together. I don't really have a board design yet. It is currently all under prototypes. I connected the circuit together using wire wrapping techniques and soldering to a prototype board. I will put together the whole circuit including the regulators ( 3.3, 2.5 and 1.2). One thing I've forgotten to answer you from the previous reply is the version and configuration Quartus. I'm currently using Quartus II 32 Bit version 13.1.0 Build 162, the unused pins is set to "As Input Tri-Stated with weak pull-up".

    So I've attached the regulator circuit from the DE0 Dev kit. Instead of using the AME1117 regulator package, I've used the LM1117 regulators with 0.8 A current support. I basically use that circuit and the schematic that I've attached in the previous reply. Let me know if that is sufficient as a schematic diagram or do you want me to put one together that shows all the connections between the regulators, the cyclone, and the EPCS4 chip.

    Thank You
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    I will have to put that together. I don't really have a board design yet. It is currently all under prototypes. I connected the circuit together using wire wrapping techniques and soldering to a prototype board.

    --- Quote End ---

    Ah, I see. Then the fact that your IC is getting hot may be due to an ESD problem you created while building the board. If this was a nice "clean" PCB and you had the same issue on multiple instances of the PCB, then the issue could be a design error. In the case of a problem with a single instance, its a bit more difficult to assign "blame". Can you switch out the FPGA for another?

    --- Quote Start ---

    One thing I've forgotten to answer you from the previous reply is the version and configuration Quartus. I'm currently using Quartus II 32 Bit version 13.1.0 Build 162, the unused pins is set to "As Input Tri-Stated with weak pull-up".

    --- Quote End ---

    Ok, then there should not be any driver conflict.

    --- Quote Start ---

    Let me know if that is sufficient as a schematic diagram ...

    --- Quote End ---

    It sounds like you've implemented everything correctly.

    Have you looked at your power-on waveforms? Are the regulator ramps monotonic? Do each of the power rails come on in sequence correctly? Does the nSTATUS pin deassert high, and does the AS mode configuration start (DCLK toggles)?

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    Dave,

    Thanks for your help. The problem is solved now. It was very unclear how Altera called different power pins. I had used an altera Max II before and the unmarked power pin in the Pin Layout represents a 3.3 V. But in this case when i printed out a copy of the pin layout from Quartus the unmarked power pin represents VCCP/VCCR/VCCT. I thought that was meant for 3.3 V for the chip main power supply. So after checking the pin names from Quartus Pin Assignments, there it shows me to be VCCD_PLL, which is meant to be connected to 1.2 V and not 3.3 V. Therefore fixed my problem, I also added decoupling caps to make sure that my power supplies have monotonic ramps. Everything works as its suppose to now. I hope this help any potential users of the Cyclone 3, to be careful about power pins. Altera documentation is horrible at their nomenclatures.

    Thank You again Dave for your help.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    The problem is solved now.

    --- Quote End ---

    Great!

    --- Quote Start ---

    It was very unclear how Altera called different power pins. I had used an altera Max II before and the unmarked power pin in the Pin Layout represents a 3.3 V. But in this case when i printed out a copy of the pin layout from Quartus the unmarked power pin represents VCCP/VCCR/VCCT. I thought that was meant for 3.3 V for the chip main power supply. So after checking the pin names from Quartus Pin Assignments, there it shows me to be VCCD_PLL, which is meant to be connected to 1.2 V and not 3.3 V. Therefore fixed my problem, I also added decoupling caps to make sure that my power supplies have monotonic ramps. Everything works as its suppose to now. I hope this help any potential users of the Cyclone 3, to be careful about power pins. Altera documentation is horrible at their nomenclatures.

    --- Quote End ---

    I haven't seen any problem with their pin assignments documentation. For example, the Cyclone III handbook page:

    http://www.altera.com/literature/lit-cyc3.jsp

    Has a link at the top to the "Pin Connections" guidelines

    http://www.altera.com/literature/lit-dpcg.jsp

    and the "Device Pinouts"

    http://www.altera.com/literature/lit-dp.jsp?category=cyc%203&showspreadsheet=y

    These two documents have everything you need regarding power pins.

    Cheers,

    Dave