Forum Discussion
Altera_Forum
Honored Contributor
12 years agoPost your schematic and then forum members can take a look.
It sounds like your 10-pin header is configured for AS mode, rather than JTAG mode. Most designers only implement the JTAG mode connector and use JIC for programming EPCS devices. What version of Quartus are you using to create your configuration file? Older versions of Quartus would set the default state of unused pins as "Output driving ground". If you create a top-level design that does not include all board-level connections, then this setting can cause driver conflicts with the external devices (the ones that drive the FPGA pins). So check your pin report file matches the board before download. Cheers, Dave