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BrianSune_Froum's avatar
BrianSune_Froum
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16 days ago
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Avalon-MM Cyclone V Hard IP for PCI Express Intel FPGA IP - Hard Reset to Soft Reset

Dear Intel, Really having a hard time on switch to soft reset. According to datasheet and forum discussion. Hard reset on the hard PCIe require a specified pin or pins to work. In order to fully ...
Configuration
Core Logic
Generic Io
Programmable Logic Device
  • BrianSune_Froum's avatar
    BrianSune_Froum
    1 day ago

    Ok the solution to resolve SRC under Hard PCIe RP:

    The example from rocketchip and MitySOM gate the mgmt reset by nreset_status.

    Due to pin_perst is not used -> 1'b1

    The nreset_status will not release unless mgmt is reset with npor while gating mgmt reset by

    nreset_status will dead lock and never exit the reset.

BrianSune_Froum's avatar
BrianSune_Froum
Icon for Contributor rankContributor
1 day ago

Ok the solution to resolve SRC under Hard PCIe RP:

The example from rocketchip and MitySOM gate the mgmt reset by nreset_status.

Due to pin_perst is not used -> 1'b1

The nreset_status will not release unless mgmt is reset with npor while gating mgmt reset by

nreset_status will dead lock and never exit the reset.