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s002wjhwen's avatar
s002wjhwen
Icon for New Contributor rankNew Contributor
10 hours ago

adding signal to debug/signaltap

does quartus has something similar to Xilinx (*mark_debug=true), where it add the mark signal to FPGA internal logic anaylzer? also how would i add signal to signaltap via command line?  i'm assumin...
Core Logic
Programmable Logic Device
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sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 hours ago

You add signals using the graphical .stp file.  Just double-click in the Node List to open the Node Finder and add signals.  If you are talking about post-fit signals, there is a "Preserve for debug" assignment in the Assignment Editor that marks signals so they are not optimized away during compilation.

As for adding signals from a command line?  I don't see options for it: 

https://docs.altera.com/r/docs/683819/26.1/quartus-prime-pro-edition-user-guide/signal-tap-command-line-options