ShivaKi
New Contributor
1 year ago5CEBA7F27C8N FPGA IO Pin Status After Power ON Reset
Hello,
For FPGA 5CEBA7F27C8N,
1. What will be the status of IO Pins after Power ON Reset, when IO pins are configured as
a. Input
b.Output
c. Input/Output
2. What will be the status of IO Pins after Functional Reset(reset implemented through coding), when IO pins are configured as
a. Input
b.Output
c. Input/Output