How to transfer data from FPGA to HPS DDR
Hi,
I have two cyclone V soc boards, and I am working on a design to transmit video data generated from the FPGA side of the first board to the second board through HPS Ethernet, and finally display it through HDMI.
In https://community.intel.com/t5/FPGA-SoC-And-CPLD-Boards-And/How-to-correctly-read-data-from-FIFO-on-HPS-and-send-it-out/m-p/1501530/emcs_t/S2h8ZW1haWx8dG9waWNfc3Vic2NyaXB0aW9ufExKTkxLVEc3VVRJVUg1fDE1MDE1MzB8U1VCU0NSSVBUSU9OU3xoSw#M25152 , I used a 32 bit wide and 2048 deep FIFO on the sending and receiving boards to store data. But now I feel that this method is not reliable. I want to use HPS DDR to store my video data, read the data from HPS DDR on the HPS side, and send it.
I don't understand how HPS DDR works. I found a method to write data to HPS DDR: https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/writing_to_hps_memory , and I tried it according to its method and succeeded.
However, I still don't know the method to transfer data from FPGA to HPS DDR. I know that I should use mSGDMA, but I'm not sure about the specific work.
Another question is whether the receiving board should use the DMA PL330 internal to HPS to send data from HPS to HPS DDR instead of mSGDMA?
Can someone tell me the general steps or provide some examples for writing data into HPS DDR?
Thank you in advance.
After testing, using the mmap function on the HPS side can read data from HPS DDR. I referred to https://github.com/zangman/de10-nano/blob/master/docs/FPGA-SDRAM-Communication_-Avalon-MM-Host-Master-Component-Part-3.md and used the mmap function to operate on HPS DDR, resulting in the same results as Zangman's.
In cycloneV soc(de10-nano), the starting address of HPS DDR is 0x0000000 and the ending address is 0x3FFFFFFF.
/* code for operating HPS DDR */ #include <stdio.h> #include <stdlib.h> #include <fcntl.h> #include <sys/mman.h> #define HPS_DDR_BASE 0x00000000 #define HPS_DDR_SPAN 0x40000000 #define HPS_AXI_BASE 0xC0000000 int main() { int fd; void *hps_ddr_base; void *h2f_base; int *addr1; int *addr2; // Open /dev/mem device fd = open("/dev/mem", O_RDWR | O_SYNC); if (fd == -1) { perror("could not open /dev/mem\n"); return 1; } hps_ddr_base = mmap(NULL, HPS_DDR_SPAN, PROT_READ | PROT_WRITE, MAP_SHARED, fd, HPS_DDR_BASE); h2f_base = mmap(NULL, 0x1000, PROT_READ | PROT_WRITE, MAP_SHARED, fd, HPS_AXI_BASE); if (hps_ddr_base == MAP_FAILED) { perror("could not mirror HPS DDR3 to user space\n"); close(fd); return 1; } // Write 0xAA to 0x20000000 addr1 = (int*)(hps_ddr_base + 0x20000000); *addr1 = 0xAA; // Write 0x1 to 0xC0000000 addr2 = (int*)(h2f_base); *addr2 = 0x1; // Unmap and close the /dev/mem device munmap(hps_ddr_base, HPS_DDR_SPAN); close(fd); return 0; }Thank you again for your help. Please close this thread, Adzim.
Regards.