Why fcs_client app resulted in page allocation failure and unable to proceed when executing on Agilex™ 5 SoC FPGA Devices?
Description Due to a problem with limited HPS memory resources on the Agilex™ 5 FPGA device (e.g., when deploying it with 1GB RAM or less), kernel memory allocation failures may occur, particularly when invoking crypto services operations via the HPS on a system with fragmented memory. Memory fragmentation can result from repeated crypto services operations, prolonged system uptime, or other workloads that dynamically allocate and free memory. Resolution To work around this problem, consider that the crypto services driver requires 4MB of contiguous memory for each encryption/decryption transaction in the kernel. While tuning parameters such as min_free_kbytes may help by encouraging earlier flushing of buffers or caches, they do not guarantee the reservation of contiguous memory. The Contiguous Memory Allocator (CMA) is enabled in the system, and its reserved size can be increased through kernel boot arguments to improve robustness against fragmentation-related failures. Users and system integrators are responsible for ensuring that the operating system is configured to meet the memory requirements of their expected workloads. Failure to do so may result in degraded performance, application instability, or functional failures.
Why are there functional failures after partial reconfiguration in Agilex™ 7/5/3 FPGA designs?
Description Due to a problem in the Quartus® Prime Pro Edition Software versions 23.2 to 25.1, you might have functional failures after partial reconfiguration (PR) in some Agilex™ FPGA devices. The failure has FPGA unit and design dependencies and does not occur in all devices. It is a time zero failure for the affected FPGA units. The problem affects all Agilex™ FPGA portfolio devices. Resolution To work around this problem: Convert your base SOF to RBF/JIC/RPD* (Base bitstream for full-chip configuration) and PR PMSF to RBF (PR bitstream) using the Quartus® Programming File Generator v25.1.1. Use the Quartus® Programmer v25.1.1 to program the Base and PR bitstreams. The problem is fixed starting with the Quartus® Prime Pro Edition Software version 25.1.1. *RPD file format is for third party programming methods, not supported in Quartus® Prime Programmer.Why does the Kernel crash with socfpga-6.6.51-lts while reading from the mtd device on the Stratix® 10 SX SoC Development Kit?
Description Due to problem in the SPI subsystem driver in socfpga-6.6.51-lts, the Power Management implementation was contributed by the open-source community. The qspi controller bind/unbind causes kernel crash/call trace issue while read/write /dev/mtd0 on Altera® Stratix® 10 SX SoC Development Kit. Resolution To workaround this problem, you need to apply the patches to socfpga-6.6.51-lts from the attached qspi-fix-6.6.51-lts.zip directory. cd linux-socfpga patch -p1 < 0001-HSD-16027100077-1-spi-cadence-quadspi-Implement-refc.patch patch -p1 < 0002-HSD-16027100077-2-spi-spi-cadence-quadspi-Fix-pm-run.patch patch -p1 < 0003-mtd-spi-nor-core-Check-against-null-pointer-to-avoid.patch patch -p1 < 0004-spi-cadence-quadspi-remove-redundant-runtime-PM-call.patch patch -p1 < 0005-HSD-14021922100-spi-cadence-qspi-add-quirk-to-disabl.patch patch -p1 < 0006-mtd-mtdchar-add-NULL-check-for-mtd-in-close-path.patch patch -p1 < 0007-mtd-core-add-NULL-check-in-put_mtd_device.patch patch -p1 < 0008-sysfs-group-use-pr_debug-for-missing-group-in-sysfs_.patch Additional Information This problem is scheduled to be fixed in a future release of the socfpga-6.12.19-lts.Why does the Kernel crash with socfpga-6.12.11-lts while reading from the mtd device on the Stratix® 10 SX SoC Development Kit?
Description Due to a problem in the SPI subsystem driver in socfpga-6.12.11-lts, the Power Management implementation was contributed by the open-source community. The qspi controller bind/unbind causes kernel crash/call trace issue while read/write /dev/mtd0 on the Stratix® 10 SX SoC Development Kit. Resolution To workaround this problem, you need to apply the patches to socfpga-6.12.11-lts from the attached qspi-fix-6.12.11-lts.zip. cd linux-socfpga patch -p1 < 0001-HSD-16027100077-1-spi-cadence-quadspi-Implement-refc.patch patch -p1 < 0002-HSD-16027100077-2-spi-spi-cadence-quadspi-Fix-pm-run.patch patch -p1 < 0003-HSD-16027100077-3-mtd-spi-nor-core-Check-for-null-po.patch patch -p1 < 0004-HSD-14021922100-spi-cadence-qspi-add-quirk-to-disabl.patch Additional Information This problem is scheduled to be fixed in a future release of the socfpga-6.12.19-lts.Why do I see the Errors in data transmission of the GTS PMA/FEC Direct PHY FPGA IP for PMA configuration rules set to CPRI with Fiber Channel RS(528,514) Forward Error Correction (FEC) enabled?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.2, when using the GTS PMA/FEC Direct PHY FPGA IP with the configurations shown below, errors will be observed in data transmission, PMA configuration rules --> CPRI FEC mode --> Fiber Channel (FC) RS(528,514) Forward Error Correction (FEC) Data Rate --> 10G Resolution This problem is fixed in 24.3.1 release of the Quartus® Prime Pro Edition Software.Why does the MIPI link fail despite successful FPGA reconfiguration (Phase 2) in HPS First boot mode on Agilex™ 5 or Agilex™ 3 SoC FPGAs?
Description For HPS First Agilex™ 5 or Agilex™ 3 SoC FPGAs designs that include shared IO in the HPS EMIF banks, a firmware problem may cause the MIPI link to fail. This is due to the shared IO potentially getting stuck in reset after FPGA reconfiguration (Phase 2). This failure is not observed for FPGA First designs or designs that do not use shared IO. Refer to 3.5. Agilex™ 5 EMIF IP for Hard Processor Subsystem (HPS) or A.1.13.1. Restrictions on I/O Bank Usage for Agilex™ 3 EMIF IP with HPS for more information regarding IO sharing. Resolution This problem is scheduled to be fixed in a future release of Quartus® Prime Pro Edition Software.Why is the GTS PMA/FEC Direct PHY IP version 5.0.0 in the Quartus® Prime Pro Edition Software project generated with QPDS 24.2 not auto upgrading the IP to version 6.0.0 in version 24.3?
Description The GTS PMA/FEC Direct PHY IP version 5.0.0 generated with version 24.2 is not auto-upgrading to IP version 6.0.0 in 24.3 due to the changes in IP parameter values. Resolution To upgrade the GTS PMA/FEC Direct PHY P version 5.0.0 generated with version 24.2 to version 6.0.0 of the IP in Quartus® Prime Pro Edition Software version 24.3, you need to manually upgrade the IP, enable custom PCS, select a valid value for the custom PCS interface, and then regenerate the IP. The table below shows the changes in parameter value for IP version 6.0.0. Select Custom PCS interface S.No Parameter value in IP version 5.0.0 Equivalent Parameter Value in IP Version 6.0.0 1 IEEE IEEE MII Interface 2 IEEE_FLEXE_66 IEEE_FLEXE_66 3 PCS66 PCS66 For more details on the custom PCS interface, please refer to the GTS Transceiver PHY User Guide. This problem is fixed in the 24.3.1 release of the Quartus® Prime Pro Edition Software.Are these pinout files for the Agilex™ 5 FPGA E-Series A5EA013B, A5EB013B, A5EE013B, A5EA008B, A5EB008B, and A5EE008B B23B packages correct?
Description No, due to a problem in the pinout files and the Quartus® Prime Pro Edition Software version 24.3.1 and prior for the Agilex™ 5 FPGA E-series devices A5EA013B, A5EB013B, A5EE013B, A5EA008B, A5EB008B, and A5EE008B, the total number of HVIOs available in the B23B package is incorrectly stated as 160. For FPGA and board design purposes, only 159 HVIOs are available as the B2 pin in bank 6D is not usable. Bank Pin Location Pin Name/Function 6D B2 HVIO Resolution To work around this problem, set the B2 pin to DNU (do not use it) in your FPGA and board designs. Bank Pin Location Pin Name/Function 6D B2 DNU This problem is fixed in the pinout files and Quartus® Prime Pro Edition Software 25.1Why does the Agilex™ 7 F-Tile Ethernet IP not correctly support the unidirectional mode of operation for data rates other than 10GE, the Tx datapath is unusable when the Rx datapath link is broken or under reset?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.3 and earlier, the Agilex™ 7 F-Tile Ethernet IP, when configured to data rates other than 10GE with Link Fault Generation Option being set to Unidirectional, does not correctly respond to local faults. The TX datapath is also unusable when the RX datapath link is broken or under reset. Resolution This problem is scheduled to be fixed in a future version of the Quartus® Prime Pro Edition Software. A patch is available to fix this problem for the Quartus® Prime Pro Edition software version 24.2. Download and install patch 0.40 for version 24.2 from the files below.What is the latest device firmware for the Agilex® FPGA and Stratix®10 FPGAs?
Description Altera® recommends using the latest version of the Quartus® Prime Pro Edition Software and the latest available device firmware. Please also see the following user guides: Updating the SDM Firmware in the Agilex® 7 FPGA Configuration User Guide Updating the SDM Firmware in the Stratix® 10 FPGA Configuration User Guide Resolution The latest device firmware available for the Quartus® Prime Pro Edition Software can be downloaded from the following links: Quartus Prime Pro Edition Software version 25.3 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 25.3? Quartus Prime Pro Edition Software version 25.1 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 25.1? Quartus Prime Pro Edition Software version 24.3.1 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.3.1? Quartus Prime Pro Edition Software version 24.3 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.3? Quartus Prime Pro Edition Software version 24.2 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.2? Quartus Prime Pro Edition Software version 24.1 What is the latest device firmware for the Quartus® Prime Pro Edition Software version 24.1? Quartus Prime Pro Edition Software version 23.4 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.4? Quartus Prime Pro Edition Software version 23.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.3? Quartus Prime Pro Edition Software version 23.2 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.2? Quartus Prime Pro Edition Software version 23.1 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 23.1? Quartus Prime Pro Edition Software version 22.4 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.4? Quartus Prime Pro Edition Software version 22.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.3? Quartus Prime Pro Edition Software version 22.2 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.2? Quartus Prime Pro Edition Software version 22.1 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 22.1? Quartus Prime Pro Edition Software version 21.4 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.4? Quartus Prime Pro Edition Software version 21.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.3? Quartus Prime Pro Edition Software version 21.2 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.2? Quartus Prime Pro Edition Software version 21.1 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 21.1? Quartus Prime Pro Edition Software version 20.3 What is the latest device firmware available for the Quartus® Prime Pro Edition Software version 20.3?
