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Why is PTP enabled F-Tile Ethernet FPGA Hard IP design using Quartus® Prime Pro Edition showing an error when the PTP enabled F-Tile Ethernet FPGA Hard IP design is connected to System PLL1 clock o...
Description Due to a limitation in the Quartus® Prime Pro Edition Software, the F-Tile Ethernet FPGA Hard IP shows an error when PTP enabled design is connected to system PLL 1 clock. This p...25Views0likes0CommentsWhy does PTP accuracy error go beyond +/- 1.5ns during dynamic reconfiguration between GTS Ethernet Hard IP and Triple-Speed Ethernet IP in Quartus® Prime Pro Edition version 26.1 and earlier?
...nd the Triple-Speed Ethernet (TSE) IP, the PTP (Precision Time Protocol) accuracy error for the GTS Ethernet Hard IP may exceed ±1.5ns in this scenario. This PTP accuracy problem does not occur with t...27Views0likes0CommentsWhy do I see PTP failure due to accuracy error exceeding 3ns in Basic PTP Timestamp Accuracy Mode on F-Tile Ethernet Hard IP when dynamically reconfiguring from 100G-4 PTP to 4x25G PTP without FEC o...
...esigns Tab 1) Select protocol/mode Ethernet and 2) Select base variant 100G-4 PTP in Table 10 of section 3.1.2. The F-Tile Dynamic Reconfiguration Suite IP Available Example Design for 100G-4 PTP to 4...105Views0likes0CommentsWhy are the PTP statistics registers showing incorrect values after reset using the F-Tile Ethernet FPGA Hard IP with PTP enabled?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 24.2 and later, when using the F-Tile Ethernet FPGA Hard IP with PTP enabled, the following registers might get r...52Views0likes0CommentsWhy does the F-Tile Ethernet Multirate IP in the Quartus® Prime Pro Edition software version 25.3 for 400GE operating in Advanced PTP Timestamp Accuracy Mode fail to meet the 1.5 ns PTP accuracy requirement?
Description Due to a problem in the Quartus® Prime Pro Edition software version 25.3, you may see that the F-Tile Ethernet Multirate IP for 400GE operating in Advanced PTP Timestamp Accuracy Mode f...52Views0likes0CommentsA problem with the F-Tile Ethernet Multirate IP in the Quartus® Prime Pro Edition software version 25.3 and earlier for 2x50GE-1 port P2 in UMR3 Dynamic Reconfiguration (DR) group (100G-4 PTP) may r...
Description Due to a problem with the F-Tile Ethernet Multirate IP in the Quartus® Prime Pro Edition software version 25.3 and earlier, PTP may fail to meet the 8 ns accuracy requirement, s...99Views0likes0CommentsWhy does the F-Tile Ethernet Dynamic Reconfiguration (DR) design not work when one of the profiles has PTP enabled?
Description Due to a problem in the Quartus® Prime Pro Edition software version 23.3, the F-Tile Ethernet designs using Dynamic Reconfiguration with PTP enabled on some of the profiles will fail t...47Views0likes0CommentsWhy does the F-Tile variant with a combination of PTP and non-PTP enabled ports within the Ethernet Subsystem FPGA IP fail to simulate correctly?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 23.2, the F-Tile variants with a combination of PTP and non-PTP enabled ports within the Ethernet Subsystem F...53Views0likes0CommentsWhy isn’t a programming (.sof) file generated for the GTS Ethernet Hard IP with PTP enabled example designs in Dynamically Reconfigurable mode when using the Quartus® Prime Pro Edition software v...
... Why don’t I get a programming file when I compile with the.... A similar programming (SOF) file generation problem is observed when you generate the GTS Ethernet Hard IP with PTP-e...116Views0likes0Comments