Stratix 10 HPS LED example

Hi Sajeev_antony,

What you see

• Cold power-on → U-Boot → Linux starts → abrupt restart ~5 s into kernel (no panic text)
• Second boot succeeds to Linux; no further restarts until next power cycle
• SPL reports Reset state: Cold after the restart

Two plausible cause:

• First-power-on reset race (FPGA/SDM/board timing) — fits “once per power-on, second try OK at same kernel point”
• Watchdog — U-Boot starts watchdog@ffd00200 (10 s); Linux must take over. On S10, WDT timeout can be configured as cold reset, so “Cold” does not rule WDT out. But ~5 s kernel time and identical second-pass timing make a simple 10 s timeout less convincing.

How to prove it:

• After the spurious restart, at U-Boot: md.l 0xffd11000 1 (rstmgr status). Compare to intentional wdt expire.
• One trial: wdt stop before bootm. If double-boot disappears → WDT involved; if not → look at FPGA/SDM/cold reset path.

Fix direction (after proof):

• If WDT: hand over to Linux (enable driver + service it), or stop in U-Boot only until Linux owns it — do not leave WDT off permanently.
• If FPGA/SDM: fix first-boot sequencing (config/bridges/nCONFIG/power) before HPS runs application software. refer: https://docs.altera.com/r/docs/683222/25.3.1/stratix-10-hard-processor-system-technical-reference-manual/signal-behavior-event-diagrams