New Contributorenable bridge crashes Linux
Hi,
We selected a Cyclone V SoC FPGA for our project. I started on Terasic demo boards (DE0 and ADC-SoC). On these boards, that both bear a Cyclone V (P/N 5CSEMA4U23C6N), I could, with a devicetree overlay, program the FPGA from Linux and enable the lwh2f and h2f bridges.
Now that we are developing a custom board, we bought an Enclustra SA2 SoM, with a Cyclone V (P/N 5CSTFD6D5F31I7N).
I am trying to apply the DT overlay on socfpga.dtsi.
/dts-v1/; /plugin/; / { fragment@0 { target = <&base_fpga_region>; // #address-cells = <0x1>; // #size-cells = <0x1>; __overlay__ { #address-cells = <0x1>; #size-cells = <0x1>; ranges = < // The .rbf file must be placed in /lib/firmware firmware-name = "soc_firwmare.rbf"; fpga-bridges = <&fpga_bridge0 &fpga_bridge1>; }; }; /* Enable the lightweight FPGA to HPS bridge (lwhps2fpga) */ fragment@1 { target = <&fpga_bridge0>; __overlay__ { status = "okay"; bridge-enable = <1>; }; }; /* Enable the HPS to FPGA bridge (hps2fpga) */ fragment@2 { target = <&fpga_bridge1>; __overlay__ { status = "okay"; bridge-enable = <1>; }; }; };
But since I switched to the SA2 module, the board freezes when `fragment@1` or `fragment@2` is not commented in the overlay.
If I comment out the `status = "okay"` lines, the board does boot and the FPGA is programmed. By dumping the live tree, I can see that the `bridge-enable` property appears under the expected node.
dtc gives no warning nor errors.
I added some debug messages ("DEBUG >>") in the kernel code, and I could see that the crash happens in some function called by regmap_write(), in regmap.c.
[ 2.632673] altera_hps2fpga_bridge ff400000.fpga_bridge: enabling bridge [ 2.639397] altera_hps2fpga_bridge ff400000.fpga_bridge: DEBUG >> Before _alt_hps2fpga_enable_set() [ 2.648424] _alt_hps2fpga_enable_set() DEBUG >> bridge brought out of reset [ 2.655377] _alt_hps2fpga_enable_set() DEBUG >> make bridge visible to L3 masters [ 2.662832] _alt_hps2fpga_enable_set() DEBUG >> spinlock acquired [ 2.668902] _alt_hps2fpga_enable_set() DEBUG >> before regmap_write() [ 2.675315] regmap_write() DEBUG >> start of regmap_write() [ 2.680865] regmap_write() DEBUG >> lock acquired [ 2.685550] _regmap_write() DEBUG >> start [ 2.689632] _regmap_write() DEBUG >> writable [ 2.693971] _regmap_write() DEBUG >> before reg_write() [ 2.699173] _regmap_write() context=0xc18d2e00, reg=0, val=0x00000011 [ 2.705598] _regmap_bus_reg_write() DEBUG >> start [ 2.710371] _regmap_bus_reg_write() after _regmap_range_lookup() [ 2.716352] _regmap_bus_reg_write() DEBUG >> after regmap_reg_addr() [ 2.722679] _regmap_bus_reg_write() DEBUG >> map->bus_context=0xc1b31980, reg=0, val=0x00000011
Now, I'm really stuck.
So, I think I made some progress.
- I enable the bridges in Barebox by setting the status and bridge-enable properties.
- In the Linux devicetree overlay, I only set the status property, not the bridge-enable property.
The Barebox DT (the "0x1" syntax matters, it seems):
&fpga_bridge0 { status = "okay"; bridge-enable = <0x1>; };The Linux DT overlay:
/dts-v1/; /plugin/; / { fragment@0 { target = <&base_fpga_region>; __overlay__ { #address-cells = <0x1>; #size-cells = <0x1>; // The .rbf file must be placed in /lib/firmware firmware-name = "soc_firwmare.rbf"; fpga-bridges = <&fpga_bridge0 &fpga_bridge1>; }; }; /* Enable the lightweight FPGA to HPS bridge (lwhps2fpga) */ fragment@1 { target = <&fpga_bridge0>; __overlay__ { status = "okay"; // Don't set bridge-enable! // bridge-enable = <1>; }; }; /* Enable the HPS to FPGA bridge (hps2fpga) */ fragment@2 { target = <&fpga_bridge1>; __overlay__ { status = "okay"; // Don't set bridge-enable! // bridge-enable = <1>; }; }; };Then, I when I check the status of the bridges, I get what I expect:
# for f in /proc/device-tree/soc/fpga?bridge*; do echo $(basename $f)":" $(cat $f/status); done fpga-bridge@ff600000: disabled fpga-bridge@ffc25080: disabled fpga_bridge@ff400000: okay fpga_bridge@ff500000: okay #I didn't try to communicate between the HPS and the FPGA yet, but it looks promising.
