ChrisBonser
New Contributor
8 months agoCyclone 5 FPGA UART driver, and read/write functions.
I am using a Cyclone 5 MitySOM on the Critical link dev kit. I am trying to setup a custom UART (RX, TX) lines from the FPGA GPIOs, not going through any external chip other than and FTDI connected to a PC. I prefer to have this code in System Verilog. I have found some example of source for the RX and TX transactions, but nothing on how they get integrated into the FGPA system.
Can you please provide me some detail, example code, etc. of how I can setup a custom UART (115200), that I can send Hello World to the PC and have it come out in a terminal window. Want to use this for log/debugging as well as a simple menu system to process incoming commands to perform actions real time.
Thanks,
Chris