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ChrisBonser's avatar
ChrisBonser
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9 months ago

Cyclone 5 FPGA UART driver, and read/write functions.

I am using a Cyclone 5 MitySOM on the Critical link dev kit. I am trying to setup a custom UART (RX, TX) lines from the FPGA GPIOs, not going through any external chip other than and FTDI connected ...
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BoonBengT_Altera's avatar
BoonBengT_Altera
Icon for Moderator rankModerator
9 months ago

Hi @ChrisBonser,


Thank you for posting in Intel community forum and hope all is well.

We can work with the setup of transmitting data serially via TX GPIO by implementing it and work on the PC terminal which is FTDI USB-UART. For the FPGA GPIO pin assignment, assign the uart_tx to a GPIO pin connected to the FTDI tx line.


On the PC terminal side, perhaps using serial terminal like Putty, set the baud rate to 115200, 8 data bit, no parity and 1 stop bit following by selecting the com port. With that you can write some system verilog code to send hello world to the pc terminal.

Hope that clarify


Best Wishes

BB