Arria 10 SoC Dev Kit Baremetal HPS examples issue & workflow

I apologize, I was not able to use Ashling RiscFree to succesfully debug either U-Boot or the bare-metal application on the A10 board. I have not used this combination before, so not sure if it is a problem with what I am doing, or something else. 

Note the 25.3 release of Ashling RiscFree installer contains an older version of the tool. You can get the latest available version from the 25.1.1 release at this link: https://www.altera.com/download-center/license-agreement/78291/289e6b3d2979a43f6ddfb46c3eeabfca0b49b3c4?filename=RiscFreeSetup-25.1.1.125-windows.exe.

Will continue after the holidays, in early January. Hopefully someone else can also help in the meantime.

I was, however, able to load and run the application from U-Boot, without a debugger. Here is how you can do that, in case it helps:

1. Compile the HWLIBs design in MSYS2:

# top folder
mkdir a10-baremetal
cd a10-baremetal
export TOP_FOLDER=$PWD

# get hwlibs
cd $TOP_FOLDER
git clone https://github.com/altera-opensource/intel-socfpga-hwlib

# install toolchain
cd $TOP_FOLDER/intel-socfpga-hwlib/tools
./install_linaro.sh
export PATH=$PATH:$PWD/gcc/bin
export CROSS_COMPILE=arm-eabi-

# build the example
cd $TOP_FOLDER/intel-socfpga-hwlib/examples/A10/Altera-SoCFPGA-HardwareLib-Timer-A10-GNU
# fix newlib location
sed -i 's|/local||g' Makefile
# use rm for deleting files
sed -i s'|cs-rm|rm|' Makefile.inc
make clean && make SEMIHOSTED=0 MEMORY=ddr

2. Get the GSRD SD card from https://releases.rocketboards.org/2025.10/gsrd/a10_gsrd/sdimage.tar.gz, extract it and write it to an SD card, for example with https://etcher.balena.io/.

3. Write the  application.axf to the FAT partition of the SD card. You can use Windows for that. Eject card after that.

4. Insert SD card, power up board.

5. Press any key when instructed during countdown, to drop to U-Boot console.

6. Run the following U-Boot commands to load and execute the bare-metal application:

load mmc 0:1 0x10000000 application.axf
bootelf 0x10000000
go 0x00100040

For reference, here is all console output:

U-Boot SPL 2025.07 (Sep 25 2025 - 01:10:31 +0000)
FPGA: Checking FPGA configuration setting ...
FPGA: Start to program peripheral/full bitstream ...
FPGA: Early Release Succeeded.
FPGA: Checking FPGA configuration setting ...
FPGA: Start to program peripheral/full bitstream ...
FPGA: Early Release Succeeded.

U-Boot SPL 2025.07 (Sep 25 2025 - 01:10:31 +0000)
DDRCAL: Success
DDRCAL: Scrubbing ECC RAM (1024 MiB).
DDRCAL: SDRAM-ECC initialized success with 334 ms
FPGA: Checking FPGA configuration setting ...
FPGA: Skipping configuration ...
Trying to boot from MMC1

U-Boot 2025.07 (Sep 25 2025 - 01:10:31 +0000)socfpga_arria10

CPU:   Altera SoCFPGA Arria 10
BOOT:  SD/MMC External Transceiver (1.8V)
Model: Altera SOCFPGA Arria 10
DRAM:  1 GiB
Core:  78 devices, 20 uclasses, devicetree: separate
WDT:   Started watchdog@ffd00300 with servicing every 1000ms (10s timeout)
MMC:   dwmmc0@ff808000: 0
Loading Environment from MMC... Reading from MMC(0)... *** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Model: Altera SOCFPGA Arria 10
Net:
Warning: ethernet@ff800000 (eth0) using random MAC address - 22:6f:9a:64:64:fe
eth0: ethernet@ff800000
Hit any key to stop autoboot:  0
=>
=> load mmc 0:1 0x10000000 application.axf
258864 bytes read in 15 ms (16.5 MiB/s)
=> bootelf 0x10000000
=> go 0x00100040
## Starting application at 0x00100040 ...
INFO: Frequency = 300000000.
INFO: Period    = 1500 millisecond(s).
INFO: Counter   = 450000000.
RESULT: Example completed successfully.