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rdrr's avatar
rdrr
Icon for Occasional Contributor rankOccasional Contributor
1 month ago
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Agilex 5 HPS porting guide

Hi, I'm wondering - what are the components that need to be adapted for a custom board based on Agilex 5. 

For the background e.g. on NXP Layerscape LS1028a in order to bring up a custom board we had to provide board-specific code in TF-A (DDR bring up for our memory config) and u-boot.

I'm wondering what does it look like on Agilex5-based boards? I'm not talking about obvious things like device-tree but rather other parts like board-specific TF-A code and so on. Would be grateful to for some information that would allow me to estimate the necessary work. Also I'm talking about FPGA-first scenario if that matters.

Arm Processor
Hps Arch
Hps Boot
  • KianHinT_altera's avatar
    KianHinT_altera
    29 days ago

    Thanks hatungw for summarizing the differences between Agilex 5 and NXP layerscape.

    Hi rdrr​ , as hatungw already answered your question, is there any further question related to this thread ? Otherwise I would like to transition this thread to community support.

    Thanks

    Regards

    Kian

     

2 Replies

  • KianHinT_altera's avatar
    KianHinT_altera
    Icon for Frequent Contributor rankFrequent Contributor
    29 days ago

    Thanks hatungw for summarizing the differences between Agilex 5 and NXP layerscape.

    Hi rdrr​ , as hatungw already answered your question, is there any further question related to this thread ? Otherwise I would like to transition this thread to community support.

    Thanks

    Regards

    Kian

     

  • hatungw_Altera's avatar
    hatungw_Altera
    Icon for New Contributor rankNew Contributor
    1 month ago

    hi rdrr​ , thanks for asking — this is something many people wonder about when starting with Agilex 5.

    For a custom Agilex 5 board, most of the board-specific work actually lives in Quartus, not in TF-A or U-Boot. Quartus generates the HPS “handoff” files that contain DDR settings, pinmux, clocks, resets, and other platform data. TF-A and U-Boot mainly read these handoff files, so you don’t normally need to write low-level DDR or initialization code like you would on something like the NXP LS1028A. The actual firmware changes on Agilex 5 are usually limited to small board config adjustments and creating a defconfig/board folder in U-Boot.

    The Device Tree is where most of your customization ends up—peripherals, PMIC, GPIOs, PHYs, and any custom FPGA IP. If you’re using FPGA-first boot, the flow is straightforward: load the FPGA (with HPS wrapper + handoff), then TF-A and U-Boot run using that data. Any hardware change in your board design simply means regenerating the FPGA image and handoff, then rebuilding TF-A/U-Boot with the updated files. Overall, the required effort is typically much lighter than platforms that rely heavily on manual board bring-up code.