Agilex 5 HPS porting guide

hi rdrr​ , thanks for asking — this is something many people wonder about when starting with Agilex 5.

For a custom Agilex 5 board, most of the board-specific work actually lives in Quartus, not in TF-A or U-Boot. Quartus generates the HPS “handoff” files that contain DDR settings, pinmux, clocks, resets, and other platform data. TF-A and U-Boot mainly read these handoff files, so you don’t normally need to write low-level DDR or initialization code like you would on something like the NXP LS1028A. The actual firmware changes on Agilex 5 are usually limited to small board config adjustments and creating a defconfig/board folder in U-Boot.

The Device Tree is where most of your customization ends up—peripherals, PMIC, GPIOs, PHYs, and any custom FPGA IP. If you’re using FPGA-first boot, the flow is straightforward: load the FPGA (with HPS wrapper + handoff), then TF-A and U-Boot run using that data. Any hardware change in your board design simply means regenerating the FPGA image and handoff, then rebuilding TF-A/U-Boot with the updated files. Overall, the required effort is typically much lighter than platforms that rely heavily on manual board bring-up code.