Agilex 5 EMAC to EMAC : Driver error

I am trying to ping one EMAC from another, and have instantiated the following in the HPS:

These are exported to the top level, then connected as followed:

// https://www.intel.com/content/www/us/en/docs/programmable/814346/25-1/fpga-emac-i-o-signals.html
module dual_emac_interface (
    input  wire        clk,
    input  wire        rst_n,

    // EMAC0 Signals
    input  wire        emac0_app_rst_reset_n_wire,
    output wire        emac0_mac_tx_clk_o_wire,     // not used in 10/100 Mbps
    input  wire        emac0_mac_tx_clk_i_wire,     // not used in 1/2.5 Gbps 
    input  wire        emac0_mac_rx_clk_wire,
    output wire        emac0_mac_rst_tx_n_wire,     // (unused) reset for tx path
    output wire        emac0_mac_rst_rx_n_wire,     // (unused) reset for rx path
    output wire        emac0_mac_txen_wire,
    output wire        emac0_mac_txer_wire,
    input  wire        emac0_mac_rxdv_wire,
    input  wire        emac0_mac_rxer_wire,
    input  wire [7:0]  emac0_mac_rxd_wire,          // for 10/100 Mbps designs, only bits [3:0] are used
    input  wire        emac0_mac_col_wire,          // valid only when operating in half duplex
    input  wire        emac0_mac_crs_wire,
    output wire [2:0]  emac0_mac_speed_wire,        // set to 3'b011 for 1 Gbps (125 MHz)
    output wire [7:0]  emac0_mac_txd_o_wire,        // for 10/100 Mbps designs, only bits [3:0] are used

    // EMAC1 Signals
    input  wire        emac1_app_rst_reset_n_wire,
    output wire        emac1_mac_tx_clk_o_wire,
    input  wire        emac1_mac_tx_clk_i_wire,
    input  wire        emac1_mac_rx_clk_wire,
    output wire        emac1_mac_rst_tx_n_wire,
    output wire        emac1_mac_rst_rx_n_wire,
    output wire        emac1_mac_txen_wire,
    output wire        emac1_mac_txer_wire,
    input  wire        emac1_mac_rxdv_wire,
    input  wire        emac1_mac_rxer_wire,
    input  wire [7:0]  emac1_mac_rxd_wire,
    input  wire        emac1_mac_col_wire,
    input  wire        emac1_mac_crs_wire,
    input  wire [2:0]  emac1_mac_speed_wire,
    output wire [7:0]  emac1_mac_txd_o_wire
);
    assign emac0_app_rst_reset_n_wire = rst_n;
    //assign emac0_mac_tx_clk_i_wire = clk;                
    assign emac0_mac_rx_clk_wire = emac1_mac_tx_clk_o_wire; //rxclk0=txclk1
    assign emac0_mac_rxdv_wire = 1'b1;                      //valid held high
    assign emac0_mac_rxer_wire = emac1_mac_txer_wire;       //rx0err=tx1err
    assign emac0_mac_rxd_wire = emac1_mac_txd_o_wire;       //din0=dout1
    //assign emac0_mac_col_wire = 1'b0;                     //full duplex
    assign emac0_mac_crs_wire = 1'b1;                       //never idle

    assign emac1_app_rst_reset_n_wire = rst_n;
    //assign emac1_mac_tx_clk_i_wire = clk;                     
    assign emac1_mac_rx_clk_wire = emac0_mac_tx_clk_o_wire;    
    assign emac1_mac_rxdv_wire = 1'b1;                         
    assign emac1_mac_rxer_wire = emac0_mac_txer_wire;           
    assign emac1_mac_rxd_wire = emac0_mac_txd_o_wire;           
    //assign emac1_mac_col_wire = 1'b0;                         
    assign emac1_mac_crs_wire = 1'b1;                                

endmodule

In the .dts, I have the following config (based on the dtsi provided by altera

&gmac0 {
	status = "okay";
	phy-mode = "gmii";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&gmac1 {
	status = "okay";
	phy-mode = "gmii";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

However, when booting into linux - the drivers appear to be unhappy:

[   26.367856] socfpga-dwmac 10810000.ethernet: Failed to reset the dma
[   26.374250] socfpga-dwmac 10810000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
[   26.383425] socfpga-dwmac 10810000.ethernet eth0: __stmmac_open: Hw setup failed
[   26.588347] socfpga-dwmac 10820000.ethernet: Failed to reset the dma
[   26.594740] socfpga-dwmac 10820000.ethernet eth1: stmmac_hw_setup: DMA engine initialization failed
[   26.603759] socfpga-dwmac 10820000.ethernet eth1: __stmmac_open: Hw setup failed

Anyone maybe know what is the issue?