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Altera_Forum's avatar
Altera_Forum
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10 years ago

Use of buffered and unbuffered clocks in circuit

I was examining the postfit results of my design and noticed that the fitter automatically inserted CLKCTRL cells into several of the clocks in my design. That is well and good but I noticed that in one of the clocks, the fitted design was using the unbuffered version of the clock (CLKCTRL INCLK) to clock a register that is fed by registers clocked with the buffered (CLKCTRL OUTCLK) version of the clock. I suppose this is okay as long as the setup and hold times are satisfied for each of the registers, but is this considered normal?

The other possible side effect to this would be to introduce a bigger skew (variation in delay) in the clock signal, possibly affecting other timing violation checks like minimum pulse width (which uses best case delay on one edge and the worst case delay on the other edge to compute the worse case clock pulse width).

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hi,

    The Quartus II will try to synthesis based on the timing constraint that user set. In the case, where the design can meet timing, the Quartus II will not put in extra effort to fit it. I suppose for the CLKCTRL should be trying to route the clock signal to a global clock tree.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    That is strange, although I have seen it before. I believe what worked for me was putting a global assignment on it. Locate the source in the assignment editor, and assign "Global Signal" to Global.

    If that doesn't, there is an altclkctrl IP variant which can be instantiated. That definitely will work.

    You're meeting timing so you're right that it doesn't matter, but not ideal either. (If you can file an SR so the software can be improved, that would be good too...)
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    In general if you meet timing, don't worry about whether it uses the clock buffering in the path. But its best to use the dedicated clock input pins when assigning external clocks. If its an internal clock, as mentioned earlier you can assign to a global.