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Bharadwaja's avatar
Bharadwaja
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8 months ago

Unable to perform Dynamic Reconfiguration on Agilex I Series Device AGIB027R29A1E2VR0

I wanted to verify the dynamic reconfiguration on Agilex I Series Device AGIB027R29A1E2VR0. I generated an example from F Tile Dynamic Reconfiguration IP with the following settings.

Once I generated the example, I also added the required power setting and the pin configurations of the board in the QSF file, and I synthesized the complete code and generated the .sof file.

Once this file was generated, I opened the programmer and added the .sof to the device and programmed the device. When I opened the system console, I got this, like the image below. The toolkit explorer is not loading the design. I am able to run the script from the TCL Console of the System Console, and it is showing all tests passed.

But if I want to configure the Tx PMA parameters (attenuation, pre-emphasis post-tap, and pre-tap values), PRBS, and similarly Rx PMA parameters (BER and loopback mode).

So my doubt from the above is

  1. To enable the system console, what are the changes to be applied?
  2. Can I see physically in the system console how the dynamic reconfiguration is changing the values?
  3. In the F Tile Dynamic Reconfiguration Design Example User Guide, UG20342-710582- 773933 (Page Number 20), it was given like

“The F-Tile Dynamic Reconfiguration Design Example runs the external loopback test by default with the loopback_mode parameter set to 0. Before performing any hardware test, attach the QSFP-DD loopback module according to the QSF pinout assignments of the respective design example. To perform an internal loopback test in hardware, modify the loopback_mode parameter to 1 in the parameter.tcl file located in /hardware_test_design/hwtest/src. After you compile the F-Tile dynamic reconfiguration design example and configure it on your Intel Agilex 7 device, you can use the System Console to program the IP core and its PHY IP core registers.”

So to use the Internal loopback mode also do we require the QSFP-DD cables. And by using the internal loopback mode, can I see the visual understanding of dynamic reconfiguration in the system console?

Hdl
Platform

6 Replies

  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    8 months ago

    Hi,

    The example design by default has no loopback mode enabled. You will need and external QSFP-DD to test the design.

    For internal loopback mode, QSFP-DD is NOT required.


    The log messages in the TCL console window should indicate the rate at which the lanes are running after reconfiguration.


    Regards


  • Bharadwaja's avatar
    Bharadwaja
    Icon for New Contributor rankNew Contributor
    8 months ago

    Hi @Ash_R_Intel,
    Thanks for the reply. Can I know if I have enabled the internal loopback mode? Why was I unable to enable the system console? Can I check the system console by making changes in the code ?

  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    8 months ago

    Hi,

    First, system console is already enabled in the design and that's how you can see the Test Pass messages. I think the error suggests that some tcl file is missing from the path from where it is supposed to be called.

    System console basically works with a JTAG interface. The system console acts as a master and the F-tile IP is at the slave side.

    If you want to exercise further capabilities through system console like Transceiver Toolkit, you can enable that by following instructions from the following page: 7.2.1. Modifying the Design to Enable F-Tile Transceiver Debug


    Moreover, just from the system console you can access the status registers to check and control the loopback mode. There is a helper script available to help you in this. Check the following and subsequent sections of the document:

    A.4.1. Introduction


    Regards


    • Bharadwaja's avatar
      Bharadwaja
      Icon for New Contributor rankNew Contributor
      8 months ago

      Respected @Ash_R_Intel ,
      Thanks for the reply.


      The IP we are going to use for Dynamic Reconfiguration is F-Tile Multirate and the IP for which above example was shown is for F-tile Direct PHY. But i am unable to find the settings in the Dynamic Reconfiguration IP. Can you help me letting me know if the method i am following is right or for Dynamic Reconfiguration IP can i check the system console and enable it?



      Also how i reinstalled the complete software for multiple times but i am seeing the same error like in the above image.

      Thanking You,
      Bharadwaja

  • Ash_R_Intel's avatar
    Ash_R_Intel
    Icon for Regular Contributor rankRegular Contributor
    7 months ago

    As the required information has been provided, I am setting the case to closure. However, it will be open for other community members to comment on.


    Regards