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anonimcs's avatar
anonimcs
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1 year ago

Timing Violations after upgrading to Quartus Pro

Hi all, I have a project working perfectly on Quartus Prime Standard version 17.1, which doesn't have any timing errors. Due to an interest of using higher speed bins for the external DDR memory (EM...
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Timing
sstrell's avatar
sstrell
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1 year ago

This doesn't really help. Can you show timing reports? Did you run Report DDR in the timing analyzer? Are the timing failures specifically with the EMIF or are they related to any other parts of your design? What does your top-level .sdc file look like?

anonimcs's avatar
anonimcs
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1 year ago

I figured the root cause, and for that I created an entry of its own, which can be found in the community with the title "Clock groups ignored by Timing analyzer". There I shared the report and the related parts of my .sdc file