The FIFO has no output waveform

Hi Richard,

Regarding the issue with the FPGA waveform simulation output, I've found that it works for some projects but not for others. After cross-referencing, I have determined that the problem is likely related to incorrect instance name mapping in the testbench.

I have one final question. I am using a 10M02SCM153C8G FPGA. I wrote a simple program, successfully programmed it onto the development board, and confirmed it produced the intended simple functionality. However, I've noticed that whenever I power cycle the evaluation board (by unplugging and replugging the USB cable), the board reverts to running the original sample code that was pre-loaded.

This leads me to believe that although I performed the programming operation, the code was not actually programmed into the FPGA's non-volatile memory. Is there a specific option in the programming interface that I must select to ensure the code is permanently written to the FPGA's internal Configuration Flash Memory (CFM) block?

As I recall, the MAX 10 series does not require an external SPI EEPROM for configuration, which I believe is correct. Does this also mean that if I do not select the correct programming option, the code is only loaded into the FPGA's volatile SRAM, and is therefore lost upon power-off?