The best way to implement SignalTapII

Hi Barry,
starting with your last question, yes a design recompilation is required when you change the list of acquired signals or signal options (trigger- , data-, storage enable, storage qualifier). Also when changing sample depth, type of trigger logic or any power-up trigger parameter. Changing the trigger doesn't require recompilation if all involved signals have already trigger enable set. Chosing acquired signals and signal options thoughfully avoids frequent recompilation.

I use regularly only pre-synthesis signals for Signal Tap. Finding signals respectively making it visible for Signal Tap can be tricky though. You referred to "keep" synthesis attribute, but it's only applicable for combinational nodes. Registers need "preserve" or "noprune" in case of fanout-free registers (e.g. pure debug registers). Output signals of a sub module can be tapped at the source.

Regards
Frank