Forum Discussion
Quartus 26.1 type inheritance bug.
An interface defines a parametrised type.
A module instantiates the interface with a certain parameter value. Thet interface is connected to a module port of an instantiated module.
That module, in turn, extracts the (already parametrised) type from its module port.
It then contains a nested module, which inherits every type definition from the enclosing scope. And it all works, if the enclosing scope explicitly defines the types. But if the type is the one that has been extracted from the module port interface, then the plot thickens.
Apparently, the nested module knows the size of the type it inherited, but does not know its structure members. And only if the inherited type was extracted from an interface.
Attached is a project archive, containing a demo SV file and the settings. Not much is set (read: nothing but the chip type), as the code does not pass the compilation phase, but anyway. The demo code is really short, just 1 SV file, maybe 50 actual code lines, plus lots of comments.
I had filed an enhancement ticket. Will get back to you once any further feedback on the ticket
12 Replies
- ShengN_altera
Super Contributor
Hi,
Possible do like the attached file? Move out the submodule and using parameter.
Do you encounter problem if using other compiler software?
- Kocsonya
New Contributor
Thanks. First, yes the bug exists in older Quartus versions as well, although in slightly different forms.
Second, I know that in this particular case there are very easy work-arounds. This bit of code was written to demonstrate the bug and has nothing to do with the real code.
Where the bug actually was discovered is a much more complex system, many SV files, some quite long. There is a complex and intricate interplay between parameters, interfaces, packages, and types which, even if it sounds counterintuitive, actually make the code both more readable and much more maintainable. Due to the nature of the project, I can't show you any actual code, but I can tell you that it would (or will, if Altera does not fix the bug) be a huge amount of work to 'just move it out and use a parameter'.
What I am looking for here is a confirmation of the bug, and, hopefully, some hint from Altera that it would be fixed soon.
- ShengN_altera
Super Contributor
Do you encountered the same problem with other vendor software compiler like Vivado?