gomezramones
New Contributor
3 years agoProblem FSM
There is a problem that when I tried to design a FSM, the code never enters to that part. I simulated the same code in ModelSim and it was working fine.
FSM_I2C : process(current_state,next_state,i2c_start,Flag,i2c_clk_previous_internal, id2c_scl_i_clock,i2c_sda_oe) begin --if (RISING_EDGE(Clk)) then case current_state is when IDLE => counter_variable <= 7; if i2c_start = '1' then next_state <= START; i2c_sda_oe <= '1'; else next_state <= IDLE; end if; when START => if Flag = '1' then i2c_sda_wr <= '0'; next_state <= ADDRESS; end if; when ADDRESS => if counter_variable /= 0 then if id2c_scl_i_clock = '1' and i2c_clk_previous_internal = '0' then counter_variable <= counter_variable - 1; i2c_sda_wr <= I2C_ADDRESS_SENSOR(counter_variable-1); end if; else if id2c_scl_i_clock = '1' and i2c_clk_previous_internal = '0' then i2c_sda_wr <= I2C_WRITE_RW; counter_variable <= 7; next_state <= ACK; end if; end if; when ACK => i2c_sda_oe <= '0'; if i2c_clk_previous_internal = '0' and id2c_scl_i_clock = '1' then next_state <= IDLE; end if; when others => next_state <= IDLE; end case; --end if; end process FSM_I2C;
this is just a part of the I2C algorithm. In this case, I'm just implementing sending the address to see if my code is working fine. However, this is the output
Only works when I put inside the FSM a conditional IF(RISING_EDGE(CLK)), but I don't understand why since I'm updating all the variables in other process.
process (Clk,reset_reset_n) begin if reset_reset_n = '0' then current_state <= IDLE; id2c_serial_scl <= '0'; id2c_serial_sda <= '0'; elsif (RISING_EDGE(Clk)) then current_state <= next_state; id2c_serial_scl <= i2c_clk_previous_internal; id2c_serial_sda <= id2c_serial_sda_o_internal; id2c_scl_i_clock <= i2c_clk_previous_internal; end if; end process;
The problem was not the triggered in the FSM. When you have a FSM and some signals are going to change in some cases, you need to initialize them at the beginning so the FSM can see signals change in every case possible.