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Altera_Forum
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9 years ago

modelsim ase 10.4d/quartus lite 16.0,15.1 on linux source font problem

I can't read vhdl/verilog source because of too small font around 1pt.

tools->edit preference->source windows->fixed font or text font size setting change was no effect.

This problem is same after version down to quartus prime 15.1.

Modelsim(vsim) looks porting soft from windows .net.wm application. So I can't find how to change X11 font setting.

Does anyone know the workaround of this problem ?

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