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RRomano001's avatar
RRomano001
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6 years ago

Linux Qsys Now "platform designer", ALT_PLL Altera FPGA IP doesn't save, crash.

Linux Qsys Now "platform designer", from old time still has trouble never addressed.

ALT_PLL Altera FPGA IP open in a small window with scroll bar, if something is touched in this state after long time crash.

If enlarged scroll bar disappear and PLL can be edited but again doesn't save.

This trouble is present till version 15.0.

Tcl file is messed up and unreadable.

The only way to use PLL on linux platform is to import old PLL file then edit parameter by hand.

Attached actual file I patched to generate Frequency I need on my design.

When opened for edit all parameter are set in different unit and still try to save leave untouched.

How can I cure this unpleasant issue?

Linux Mint release 17.2

Intel I7, Sony Vaio Pro SVS1511C5E 16GB ram.

As oon picture crash.

25 Replies

  • Serqetry's avatar
    Serqetry
    Icon for New Contributor rankNew Contributor

    I'm on Quartus Prime Lite 23.1 on Linux, and this ALTPLL Altera FPGA IP module (now called ALTPLL Intel FPGA IP) still does not work. Using the hack mentioned here I can get get the wizard to create it, but I cannot configure it. Any time you get to the (3) Output Clocks page, the wizard crashes. The hack seems to keep it from aborting and deleting it, but there's no way to configure the clocks.

    This is a major bummer... it seems to be unusable. If anyone knows how to get around this so the output clocks can be configured... I'd greatly appreciate it.

    • gregh3285's avatar
      gregh3285
      Icon for New Contributor rankNew Contributor

      @Serqetry, last year when I posted the above, I was working on the University of Colorado Boulder's FPGA specialization on Coursera. A couple things I learned. Ultimately, Altera (now Intel) do not do a good job of supporting Linux. They just don't. Other tools within the Intel tool chain became maddeningly difficult to get work (if ever) under Linux. Don't even getting me started on Nios. In the end, I spent days of time trying to get Linux to work. Honestly, I switched to Windows. And, Windows just worked. If you have the option to switch to a Windows PC with Intel tools, I would. If you don't, you're going to face an uphill battle as this is will likely be the first of many challenges. I know this doesn't answer your question. But, I wouldn't wish my journey last year (before I switched to Windows) on my worst enemy. Sorry.

      • Serqetry's avatar
        Serqetry
        Icon for New Contributor rankNew Contributor

        Thanks for the reply! I'm taking the same Coursera courses now, so that's one reason I ran into the exact same problem as you. I know what you mean, Linux usually gets way less attention than Windows, but honestly I'm super grateful Quartus Prime and the other tools are supported on Linux because I'd rather quit computers and electronics and take up botany than daily drive Windows. I do keep a Windows VM around for the situations where something just won't work otherwise... but honestly my biggest complaint with the Coursera stuff is that classes are so horribly out of date. Quartus Prime 16?... why do they not update these courses? I'm amazed I've been able to get this far with the newer versions of Quartus, There's definitely been some ancient crusty file compatibility issues but that's Coursera's fault. You may be right and I'll run into even more trouble in the later courses, so I'll keep that VM on standby and try to not struggle too much. Thanks for the heads up.

    • RGarito's avatar
      RGarito
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      I'm actually on Quartus Prime Like 23.1 for Windows and the same exact thing happens here (so it's not just a Linux issue).

      I applied the modification above (the file was located in C:\intelFPGA_lite\23.1std\ip\altera\sopc_builder_ip\altera_avalon_mega_common )

      but it did not help

      You can get to the PLL Reconfiguration but when you click Next, the wizard closes and the PLL you were building disappears from the design.

    • PetrSk's avatar
      PetrSk
      Icon for New Contributor rankNew Contributor

      I'm on Quartus Prime Lite 23.1 on Linux too, on the same Coursera class. I managed to configure the clocks by attaching gdb to the wizard, setting a breakpoint on the crashing function, and forcing return of two frames always when it gets called.

      First, to enable attaching gdb to a running proces, run as root:

      # echo 0 > /proc/sys/kernel/yama/ptrace_scope

      Run the PLL wizard from Quartus. In a separate terminal, find the PID of the wizard process (the number from the second column):

      $ ps aux | grep mega_altpllq

      Attach gdb to it (substitute the proper pid), set up a few things, and resume the wizard:

      $ gdb -p 260525

      (gdb) set confirm off

      (gdb) br _ZN27ALTCLKLOCK_CLK_SETTING_PAGE29should_enable_disable_controlERK10UI_QSTRING

      (gdb) c

      Proceed with the wizard. When switching to the (3) Output Clocks page, or on any modification of the data therein (which you need a handful of times), the breakpoint triggers. Switch to the terminal with gdb and do

      (gdb) return

      (gdb) return

      (gdb) c

      When you're done with the wizard, you can exit the gdb and close the terminal.

      I also applied the change to the if in the .tcl file. I don't know if it's needed.

      I agree with the sentiment that this is a fun class and that the tooling is a huge pain.

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor

    We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum cases, along with others, did not get through as intended. As a result, we have a backlog of cases that we are currently working through one by one.

    Please be assured that we are doing everything we can to resolve this issue as quickly as possible. However, this process will take some time, and we kindly ask for your patience and understanding during this period. The cases will be attended by AE shortly.

    We appreciate your patience and understanding, and we are committed to providing you with the best support possible.

    Thank you for your understanding.


  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor

    Hello,


    To get proper support on every specific issue you are facing, please kindly post the question in the new thread to get it properly assigned.


    Thank you so much for your understanding.