Forum Discussion
ContributorLinux Qsys Now "platform designer", ALT_PLL Altera FPGA IP doesn't save, crash.
New ContributorI'm on Quartus Prime Lite 23.1 on Linux, and this ALTPLL Altera FPGA IP module (now called ALTPLL Intel FPGA IP) still does not work. Using the hack mentioned here I can get get the wizard to create it, but I cannot configure it. Any time you get to the (3) Output Clocks page, the wizard crashes. The hack seems to keep it from aborting and deleting it, but there's no way to configure the clocks.
This is a major bummer... it seems to be unusable. If anyone knows how to get around this so the output clocks can be configured... I'd greatly appreciate it.
New Contributor@Serqetry, last year when I posted the above, I was working on the University of Colorado Boulder's FPGA specialization on Coursera. A couple things I learned. Ultimately, Altera (now Intel) do not do a good job of supporting Linux. They just don't. Other tools within the Intel tool chain became maddeningly difficult to get work (if ever) under Linux. Don't even getting me started on Nios. In the end, I spent days of time trying to get Linux to work. Honestly, I switched to Windows. And, Windows just worked. If you have the option to switch to a Windows PC with Intel tools, I would. If you don't, you're going to face an uphill battle as this is will likely be the first of many challenges. I know this doesn't answer your question. But, I wouldn't wish my journey last year (before I switched to Windows) on my worst enemy. Sorry.
