ContributorHow does Quartus know what is voltage on each FPGA I/O bank?
It is possible to connect different voltages to each bank of an FPGA. The I/O standard of the pins on the FPGA relies on what bank voltage has been connected to it.
Now my questions are:
1. How does Quartus know what voltage is connected to the banks?
2. If Quartus does not know the voltage on the banks, how does it know what I/O standard can be applied on the I/O pins?
3. What constraints exist on what voltage can be supplied to the banks in an FPGA?
I am using a MAX10 10M50DAF device. However, a general purpose answer is preferred on this website.
To New Contributor I,
In the Pin Planner you specify what voltage goes to each I/O bank. This is done on a pin-by-pin basis. It will give you a (compilation) error if you specify pins with two different voltages on the same bank. It's up to you to connect the correct voltage to each I/O bank on your circuit board.
