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gyuunyuu's avatar
gyuunyuu
Icon for Contributor rankContributor
5 years ago
Solved

How does Quartus know what is voltage on each FPGA I/O bank?

It is possible to connect different voltages to each bank of an FPGA. The I/O standard of the pins on the FPGA relies on what bank voltage has been connected to it. Now my questions are: 1. How d...
  • GLees's avatar
    GLees
    5 years ago

    To New Contributor I,

    In the Pin Planner you specify what voltage goes to each I/O bank. This is done on a pin-by-pin basis. It will give you a (compilation) error if you specify pins with two different voltages on the same bank. It's up to you to connect the correct voltage to each I/O bank on your circuit board.

AminT_Intel's avatar
AminT_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hello,

Thank you for using out Intel® FPGA. That can all be done by using tools in Intel® Quartus®. Everything is done manually where you decide the I/O Standard of your design and then there will be a value(s) of voltage that is allowed on that particular I/O Standard that you have set.

You can refer to document from this link on page 9: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_gpio.pdf

Like example from the table on page 9: If you pick 3.3V LVCMOS you are allowed to put 3.3V/3.0V/2.5V for Vccio input and 3.3V output. There is no guarantee that you device will be okay if you set beyond the recommended voltage from the document above.

I hope this answer helps.

Thank you.

gyuunyuu's avatar
gyuunyuu
Icon for Contributor rankContributor
5 years ago

Please check the attached image. It shows the available options for the pin I/O standards. The options are all over the place.

If Quartus knew that my I/O bank was lets say at 3.3V, it won't show me all those 1.0V and 2.5V options in the drop down menu. Do you understand my question now?

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    5 years ago

    If you select an invalid I/O standard voltage for your device, you'll get an error during compilation.

    • gyuunyuu's avatar
      gyuunyuu
      Icon for Contributor rankContributor
      5 years ago

      How does it know if it is invalid? I never told it what voltage supply I connected to the bank to begin with.

      There is no option where we can specify what voltage supply is connected per bank on the FPGA.

      None.

      • AminT_Intel's avatar
        AminT_Intel
        Icon for Regular Contributor rankRegular Contributor
        5 years ago

        Hello,

        It will be invalid if your setting does not meet the specifications of the device. We have a lot of tutorial videos about using Quartus on our Intel FPGA Youtube channel. Here is the video about Chip Planner in Quartus Prime Pro Software: https://www.youtube.com/watch?v=Bt-yDRReKZw

        Thanks