New Contributor
New ContributorPlease find the response as below:
1. It is a customized JTAG board.
2. 0x00000000 is the EXTEST code and the boundary length is 48bits
3. No, It is the only device connected (soo far) in the chain.
Regular ContributorSorry, as I do not quite understand what you mean on the customized JTAG board. What FPGA device are you using in this case?
Regular ContributorDear Customer,
Since there has been no response for a few days now, I will step back and allow the community to assist with any future follow-up questions.
Thank you for engaging with us!
Best regards,
Altera Technical Support
New ContributorHello There,
It is a board with the JTAG pinouts and the USB transceiver. I cannot share more details about the board.
Would be great if you can help me with the provided info.
What I want is to reset the TAP-State after each boundary operation. Want to understand if this can be done using Quartus GUI application or Quartus Command line application.
If not then what are the other options.
I tried closing the device and session and reopening it, also tried sending the bypass and flush DR as shared in one of the discussions (Hard reset with USB-Blaster and Quartus | Altera Community), but nothing helped.
wanted to know if there is any command through which I can control the driver and send reset to the device?
BR,
Alkesh
Regular ContributorHi,
Which Altera Part Number you are using?
regards,
Farabi
Regular ContributorHello,
1- You can use device_run_test_idle after each IR/DR transaction to leave the TAP in Run-Test/Idle (RTI) state. If you leave the TAP in shift-DR/Pause-DR by accident, eg. wrong DR length etc, the next scan will be read garbage on TDO. Quartus exposes RTI cycling explicitly :
#after your IR/DR transaction
$ device_run_test_idle -num_clocks 8
2- Can try lower JTAG TCK speed
#example
$ jtagconfig --setparam <CableIndex> JtagClock 6M
3- There is no Tcl to pulse TRST, but you can always reset the TAP by holding TMS=1 for 5 clk cycles.
Conclusion:
1- A soft-reset may still leave the TAP in a non-idle state when the scan length or TMS sequence was not aligned. The solution is to provide a correct lengths/opcodes then explicitly park in RTI using "device_run_test_idle".
2- Use the correct BSDL-derived IR/DR parameters and park the TAP in Run-Test/Idle between scans using "device_run_test_idle". You can also try to reduce the TCK speed to lower speed. This will eliminate the "wrong TDO on second scan" error with Quartus TCL JTAG APIs.
regards,
Farabi
Regular ContributorDo you have further question?
regards,
Farabi