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BKB's avatar
BKB
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Generated visible in "Report Clocks" but the same generated clock not found during timing analysis

Hi,

In my design when I report clocks, I see that the the clock in question is generated and the generated clocks are set to be asynchronous by "set_clock_groups -asynchronous ...." in the top level .sdc but during the timing analyzer cannot find those clocks and gives critical warning that the clocks could not be matched with a existing clock which leads to timing violations to be reported.

The relevant snippets are attached.

The .sdc has additional derive_pll_clocks at the beginning of the file but that command is ignored.

Please suggest ways that the timing analyzer can detect the clock and apply the set_clock_group constraint.

Thanks

BB

5 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    Have the .sdc files generated by these IP been added to the project? EMIF usually has its own .sdc that gets added automatically. Have you tried running report_sdc in the timing analyzer to see the actual constraints that are being applied to the design?

  • BKB's avatar
    BKB
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    The SDC's for PLLs and other IPs are also automatically added. As per the "Report SDC File List" the sdc for the clock_control_blocki is added and shown in the list with other sdc file.

    But in the list generated by "Report SDC" there is no constraint from the clock_control_block_i and hence the constraint which is trying setting the clock groups asynchronous is ignored.

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    2 years ago

    So in your top-level .sdc (you have one, right?) you should have a create_clock for the reference clock input to the device.

  • BKB's avatar
    BKB
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Yes, I do have a top-level .sdc. I didn't have create_clock at that level as the IP generating that clocks was already having that in its sdc and the clocks were also visible in the "report clocks" list.

    I added the create_clock reference and the messages went away. Thanks for your help SStrell.

    Best,

    BB

  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.