Forum Discussion
FPGA example design for Agilex 7 with HPS connected to SDRAM
I am trying to create design for the Agilex HPS SDRAM and I'm running into issues.
Does anyone have any experience with this and may be know where i can find design example?
I found some references but not acurate, so i could not follow them.
Thanks,
Hello,
May I know what is the issue that you're facing?
Have you checked the HPS example design from RocketBoards website?
Regards,
Adzim
8 Replies
- AdzimZM_Altera
Regular Contributor
Hello,
May I know what is the issue that you're facing?
Have you checked the HPS example design from RocketBoards website?
Regards,
Adzim
- awaissman
New Contributor
Hi Adzim,
I wish I could find it on my own.This is what I looked at and I am wondering why no similar reference designs are available at Intel site.I am in the process of building it with Quartus version 24.1.0.Successfully complete updating all IP's and waiting for completion.Again thanks.Albert,- sstrell
Super Contributor
All HPS-related design examples and code are at Rocketboards, so you won't find them at the Intel web site.
- AdzimZM_Altera
Regular Contributor
Hi Albert,
There are two KDBs that you can refer to workaround the error.
- https://www.intel.com/content/www/us/en/support/programmable/articles/000086164.html
- https://www.intel.com/content/www/us/en/support/programmable/articles/000088060.html
You can submit a new thread to continue the discussion on this issue as this thread is discuss for different question and marked as solved already.
I will close this thread.
Regards,
Adzim