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awaissman's avatar
awaissman
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2 years ago
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FPGA example design for Agilex 7 with HPS connected to SDRAM

I am trying to create design for the Agilex HPS SDRAM and I'm running into issues. Does anyone have any experience with this and may be know where i can find design example? I found some references...
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awaissman's avatar
awaissman
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2 years ago

Hi Adzim,

I wish I could find it on my own.
This is what I looked at and I am wondering why no similar reference designs are available at Intel site.
I am in the process of building it with Quartus version 24.1.0.
Successfully complete updating all IP's and waiting for completion.
Again thanks.
Albert,
sstrell's avatar
sstrell
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2 years ago

All HPS-related design examples and code are at Rocketboards, so you won't find them at the Intel web site.

  • awaissman's avatar
    awaissman
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    2 years ago

    This is understood able, what i meant is why Intel do not provide any HSP design reference on Intel side.

    You can find plenty references designs for Nios but not for HPS.

    Thanks,

    • sstrell's avatar
      sstrell
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      2 years ago

      Because Rocketboards was set up as a dedicated site for HPS designs and code. It's been like that since the first HPS devices in 2012/2013.

      • awaissman's avatar
        awaissman
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        2 years ago

        Got it,

        Still why no references at Intel site for this arrangement.

        I could not find this on my own, glad that Adzim reply.

        In any case it's resolved.

        Thanks.