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New Contributor

1 year ago

Solved

FPGA example design for Agilex 7 with HPS connected to SDRAM

I am trying to create design for the Agilex HPS SDRAM and I'm running into issues. Does anyone have any experience with this and may be know where i can find design example? I found some references...

Platform

AdzimZM_Altera
1 year ago
Hello,

May I know what is the issue that you're facing?

Have you checked the HPS example design from RocketBoards website?
https://www.rocketboards.org/foswiki/Documentation/HPSExampleDesignForAgilex7ISeriesDeKit2xRTileAnd1xFTile

Regards,
Adzim

AdzimZM_Altera

Regular Contributor

1 year ago

Hi Albert,

There are two KDBs that you can refer to workaround the error.

https://www.intel.com/content/www/us/en/support/programmable/articles/000086164.html
https://www.intel.com/content/www/us/en/support/programmable/articles/000088060.html

You can submit a new thread to continue the discussion on this issue as this thread is discuss for different question and marked as solved already.

I will close this thread.

Regards,

Adzim

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FPGA example design for Agilex 7 with HPS connected to SDRAM

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