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Altera_Forum
Honored Contributor
8 years agoError (23031): Evaluation of Tcl script import_compile.tcl unsuccessful
Info: Command: quartus_cdb -t import_compile.tcl
Info: Using INI file /home/temp/Desktop/workspace/wisconsin5/wisconsin5/bin/conv/quartus.ini Info (125061): Changed top-level design entity name to "top" Info (125061): Changed top-level design entity name to "kernel_system" Info (16677): Loading synthesized database Info (16734): Loading "synthesized" snapshot for partition "|". Info (16678): Successfully loaded synthesized database: elapsed time is 00:00:29 Error (23031): Evaluation of Tcl script import_compile.tcl unsuccessful Error: Quartus Prime Compiler Database Interface was unsuccessful. 1 error, 0 warnings Error: Peak virtual memory: 12152 megabytes Error: Processing ended: Wed Nov 15 01:19:43 2017 Error: Elapsed time: 10:30:25 Error: Total CPU time (on all processors): 11:41:19 I have this error in my quartus_sh_compile.log. But this only happens to my designs with large size (70% utilization). It will say 'failed to generate hardware' after around 10 hour's compilation. And by the way, the "<installation directory>/quartus/bin" directory was not in my PATH variable when that happend, but the hardware could be generated for this kernel with small size. I have the quartus_sh_compile.log and <kernel_name>.log attached. aoc --version Intel(R) FPGA SDK for OpenCL(TM), 64-Bit Offline Compiler Version 16.1.0 Build 196 Copyright (C) 2016 Intel Corporation quartus_map --version Quartus Prime Analysis & Synthesis Version 16.1.0 Build 196 10/24/2016 SJ Pro Edition Copyright (C) 2016 Intel Corporation. All rights reserved15 Replies
- Altera_Forum
Honored Contributor
I see. So if the fitter crushes due to RAM limit, the log file would not say any thing about that?
- Altera_Forum
Honored Contributor
Hi
Can you confirm if your BSP version(if not Altera's board) is match with the SDK version? This error usually link to version miss match. Regards, CloseCL (This message was posted on behalf of Intel Corporation) - Altera_Forum
Honored Contributor
Hi,
Thanks for your reply! I am using altera arria10soc, and below is the board_env_xml, <board_env version="16.1" name="altera_a10socdk"><hardware dir="hardware" default="a10soc"/><platform name="arm32"><linkflags>-L%b/arm32/lib</linkflags><linklibs>-lalterahalmmd -lalterammdpcie</linklibs><utilbindir>%b/arm32/bin</utilbindir></platform><platform name="linux64"><linkflags>-L%b/arm32/lib -L%a/host/arm32/lib</linkflags><linklibs>-lalterahalmmd -lalterammdpcie</linklibs><utilbindir>%b/arm32/bin</utilbindir></platform><platform name="windows64"><linkflags>-L%b\arm32\lib</linkflags><linklibs>-lalterahalmmd -lalterammdpcie</linklibs><utilbindir>%b\arm32\bin</utilbindir></platform></board_env> And below is my aoc version Intel(R) FPGA SDK for OpenCL(TM), 64-Bit Offline Compiler Version 16.1.0 Build 196 Copyright (C) 2016 Intel Corporation They are all 16.1. (It just cannot finish for a larger size of the design so I think the version should not be the problem?) Regards, Lancer - Altera_Forum
Honored Contributor
--- Quote Start --- I see. So if the fitter crushes due to RAM limit, the log file would not say any thing about that? --- Quote End --- It usually does, but I think there might be cases where it doesn't. If you experience this crash only for large designs, it is certainly not due to Quartus/AOC/BSP version mismatch. As dark_visage suggested, you can try increasing your swap and see what happens. Furthermore, make sure you have the maximum possible amount of free memory before running the compilation. Finally, You can try updating your Quartus and AOC to v16.1.2. - Altera_Forum
Honored Contributor
Thanks for your following up! Yesterday I cleared the RAM and compiled again. The compilation did not crash, but it's still processing until now (it has taken 24+ hours).