Forum Discussion
6 Replies
- FvM
Super Contributor
Hi,
I suspect there are more faults. Do you understand the idea behind tmp_eq?
B.T.W., there's apparently a longer tradition of incorrect lpm_counter models. Modelsim_AE was never using eq in 220model.v, simply zeroing it.
assign eq = {16{1'b0}};
No idea if the limitations are specified somewhere? - RichardT_altera
Super Contributor
Do you observe any errors or unexpected functional behaviors during the simulation?
If so, please help to share your design by archiving the project (Project > Archive Project) so that I can investigate it further.
Please note that it's important to archive your project before upgrading your design in case of any unexpected issues.
Best Regards,
Richard Tan
- MamaSaru
Occasional Contributor
Hi Richard,
Thank you for the reply.
I did not find any other problem for now.I already revise 220model.v file and compile it with other RTL files in my project.
My design is the backend part of Arria 10 PCI Express avalon ST IP.
I can't send whole my project but instead I will send one module that instantiate lpm_counter.
You can simulete this module but you may not need to do.
Please read lpm_counter module definition in 220model.v, you can see eq output never get all zeros.Regards,
- RichardT_altera
Super Contributor
Thank you for your constructive feedback.
I have feedback this to the engineering team and we will decide whether the modified code can be implemented in the future or not.
With that, do you need further help in regards to this case?
Best Regards,
Richard Tan
- MamaSaru
Occasional Contributor
Richard,
No thanks, it was just feedback to Questa.
Thank you for your effort.
Regards, - RichardT_altera
Super Contributor
You're welcome. We're happy to help.
With that, I will transition this thread to community support.
If you have any further questions or concerns, please don't hesitate to reach out.
Thank you and have a great day!
Best Regards,
Richard Tan