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Anonymous's avatar
Anonymous
6 years ago

Confused in logic!

Hi Helpers!

I am working on a project in which i have to create 8:1 mux using 4:1 mux, I am done with the 4:1 code and then create symbol file which i used for making 8:1 mux .

4:1 code is mentioned in attachment.(If you find any error here please inform)

Problem is that when i run RTL Simulation Error occurs "WRONG OUTPUT FOR GIVEN INPUT" and i didn't get correct waveform .

Circuit Diagram is also attached!

May be i am not able to build the logic , Can someone help me in this case?

7 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor

    Without seeing the testbench or the waveform, it's hard to figure out what's wrong here.

    If A[2] is the enable signal, I'm not sure why you are inverting it going into the upper mux.

    And your s0 line (D[2]) is disconnected from the upper mux in the schematic.

    • Anonymous's avatar
      Anonymous

      I am New to this coding area!

      PLEASE help me clear my basics!

      Suppose i have a 4:1 mux and have 4bit input i0,i1,i2,i3, (s0,s1)select lines and output Y.

      I use two vcc pins A and B to connect with 4:1.

      I want to know that when WE USE RTL Simulation It Give random values to the input and check expected output with the current output , It give random value to A and B or i0,i1,i2,i3.

      Can anyone help me design or can anyone design 8:1 mux using 4:1 mux?