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Altera_Forum
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9 years ago

Conditional assignment statement vs selected assignment statement

Hello,

I have some experience with VHDL, but now I am trying to understand the details and not just using the code.

What is the difference between the conditional assignment statement and the selected assignment statement? Additionally why in the example below can't be assign when r(3) = '1', but we have to consider all possibilities?

Considering the following example of a priority encoder where r is a 4 bit input binary sequence to be encoded.

with r select

code <= "11" when "1000"|"1001"|"1010"|"1011"| "1100"|"1101"|"1110"|"1111",

"10" when "0100"|"0101"|"0110"|"0111",

"01" when "0010"|"0011",

"00" when others;

refers to page 22 in the document linked below

code <= "11" when (r(3)=’1’) else

"10" when (r(2)=’1’) else

"01" when (r(1)=’1’) else

"00";

refers to page 10 in the docment linked below

Thanks! :)

http://ece-research.unm.edu/jimp/vhdl_fpgas/slides/concurrent_stmts.pdf

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    In this instance there is no difference, the final logic should be the same.

    But with select will always be a normal mux, as all conditions have to be covered.

    The second example can be used to infer all sorts of logic. In this case it's a priority mux, as r(3) has priority over 2, etc.

    but you could also infer a latch:

    code <= ip when en = '1';

    or some other logic:

    code <= a when ip1 = '1' else b when ip2 = '1' else c;
  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    A normal mux you mean that in this case for the with select we obtain an implementation that considers all inputs ? i.e. implemented with a 16-to-1 mux?

    But also like this the circuit won't be prioritized no?
  • Altera_Forum's avatar
    Altera_Forum
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    9 years ago

    In your first post, both bits of code will do the same job. The synthesisor should reduce them both to be the same circuit. So yes, you will get a prioritised mux.

    with..select will always infer a mux, as all cases must be covered.

    a <= b when x else y;

    can infer lots of different circuits.