Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Conditional assignment statement vs selected assignment statement

Hello, I have some experience with VHDL, but now I am trying to understand the details and not just using the code. What is the difference between the conditional assignment statement an...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

A normal mux you mean that in this case for the with select we obtain an implementation that considers all inputs ? i.e. implemented with a 16-to-1 mux?

But also like this the circuit won't be prioritized no?