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Altera_Forum's avatar
Altera_Forum
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9 years ago

Conditional assignment statement vs selected assignment statement

Hello, I have some experience with VHDL, but now I am trying to understand the details and not just using the code. What is the difference between the conditional assignment statement an...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Ah yes of course, its clearer now.

Thanks a lot for your help!