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Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Clock missing from Timing Analyzer - Report Setup Summary

I have a clock mux along the lines in "ug-qps-03-design-recommendations.pdf" I have set the output clock to be a Global Clock in the Assignment Editor and I give it's minimum period in the sdc file....
Timing
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

Hi,


I guess you have create clock for your input clock and derive the pll clock.


In the timing analyzer, can you leave the From clock and To clock blank.

Then in Targets section, in either the From or To column search the HDMI_TX_CLK i think may be using get_keepers.

After that report timing.


Thanks,

Regards,

Sheng


Mikexx's avatar
Mikexx
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Sorry for the late reply. Holidays get in the way of work, plus a rush project.

If I go to:

Timing Analyzer -> Constraints -> Set Maximum Delay -> From -> click on 3 dots

Collection -> get_clocks

Filter -> *HDMI_TX_CLK* (with asterisks)

List

I can see 1 match of HDMI_TX_CLK

Hope this helps.