Forum Discussion
ShengN_altera
Super Contributor
1 year agoHi,
I guess you have create clock for your input clock and derive the pll clock.
In the timing analyzer, can you leave the From clock and To clock blank.
Then in Targets section, in either the From or To column search the HDMI_TX_CLK i think may be using get_keepers.
After that report timing.
Thanks,
Regards,
Sheng