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Altera_Forum's avatar
Altera_Forum
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8 years ago

changing output from two always blocks

I'm new to verilog so please forgive any ignorance:

i'm using the vga_adapter module which for the purpose of this question just requires an x and y value

I use two always blocks to do the math and get the values i want: reg [7:0] x0,y0 and reg [7:0] x1,y1 from always block 1 and 2 respectively, how would I code something such that the vga_adapter gets x0,y0 if write_en = 1, or else x1,y1

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi Bobdoe,

    Use If else statement like bellow .

    if (write_en)

    begin

    temp1<= x0;

    temp2<= y0;

    end

    else

    begin

    temp1<= x1;

    temp2<= y1;

    end

    Best Regards

    Vikas Jathar

    Intel Customer Support – Engineering

    (Under Contract to Intel
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Would i put this in a third always block, because from my understanding thats the only way if statements will work? if so, won't I get : Error (10028): Can't resolve multiple constant drivers, due to x1, x0, y1, y0 being in two different always blocks.

    Thanks for you help.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    The error you mention is from having two always blocks, as it says. Maybe post your code here. That will make it easier to answer your question.