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Altera_Forum
Honored Contributor
Honored Contributorchanging output from two always blocks
I'm new to verilog so please forgive any ignorance: i'm using the vga_adapter module which for the purpose of this question just requires an x and y value I use two always blocks to do ...
Altera_ForumHonored Contributor
Honored ContributorThe error you mention is from having two always blocks, as it says. Maybe post your code here. That will make it easier to answer your question.
